贾浩

博士后

Email：jiahao@@gdiist.cn

研究方向：

类脑芯片与系统集成

个人简介：

2018年本科毕业于电子科技大学电子科学与工程学院集成电路设计及集成系统专业，2023年于复旦大学取得电子信息博士专业学位。博士期间围绕领域专用处理架构（Domain-Specific Architecture, DSA）的芯片系统设计和领域应用开展研究。参与国家自然科学基金、上海市新一代人工智能市级重大专项等多项课题，具体研究内容包括类脑计算芯片与系统、超低延时行情数据分发系统等。完成了粗细粒度可重构的类脑计算系统FPGA原型样机和ASIC芯片，以及超低延时行情数据分发系统FPGA样机等工作，相关研究成果共发表6篇学术论文，并申请发明专利2项。

代表论著：

1. H. Jia, Y. Huan, C. Ding, Y. Yan, et al., "A Domain-Specific Accelerator for Ultra-low Latency Market Data Distribution System," in IEEE Transactions on Industrial Informatics, vol. 19, no. 4, pp. 5465-5475, April 2023.

2. C. Ding, Y. Huan, H. Jia, Y. Yan, et al., "A Hybrid-Mode On-Chip Router for the Large-Scale FPGA-Based Neuromorphic Platform," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 69, no. 5, pp. 1990-2001, May 2022.

3. B. Huang, Y. Yan, H. Jia, C. Ding, et al., "AIOC: An All-in-One-Card Hardware Design for Financial Market Trading System," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69, no. 9, pp. 3894-3898, Sept. 2022.

4. H. Chu, Y. Yan, L. Gan, Hao Jia, et al., "A Neuromorphic Processing System With Spike-Driven SNN Processor for Wearable ECG Classification," in IEEE Transactions on Biomedical Circuits and Systems, vol. 16, no. 4, pp. 511-523, Aug. 2022.

5. H. Chu, H. Jia, Y. Yan, Y. Jin, et al., "A Neuromorphic Processing System for Low-Power Wearable ECG Classification," 2021 IEEE Biomedical Circuits and Systems Conference (BioCAS), Berlin, Germany, 2021, pp. 1-5.

6. C. Ding, Y. Huan, H. Jia, Y. Yan, et al., "An Ultra-Low Latency Multicast Router for Large-Scale Multi-Chip Neuromorphic Processing," 2021 IEEE 3rd International Conference on Artificial Intelligence Circuits and Systems (AICAS), Washington DC, DC, USA, 2021, pp. 1-4.

7. 贾浩、郑立荣、梁龙飞、邹卓、闫钰龙、环宇翔, “一种基于负载加权的最短路径路由生成方法,” 中国发明专利, CN112511445B, 2020.（已授权）

8. 环宇翔、邹卓、郑立荣、丁宸、贾浩、闫钰龙, “用于大规模类脑计算网络的种群聚类及种群路由方法,” 中国发明专利, CN112149815B, 2020. （已授权）